Volume
16 (Special Issue on Recent Trends in VLSI Design), 2012
Four Squared-Layer Topology for Network-On-Chip
Reza Sabbaghi-Nadooshan, Mahsa Ghorbanian and Hossein
Doroud
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Design of DS-CDMA Transceiver using BPSK Modulation/Demodulation
Sanjay Kumar Jaiswal, Kumkum Verma, Dheeraj Jain
and Vijendra Maurya
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Comparative Analysis of Low Power Master Slave Single Edge Triggered
Flip Flops
Imran Ahmed Khan and Mirza Tariq Beg
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Single Chip Implementation of Serial Structure SHA-1
Yogesh Pratap, Manoj Kumar and Jitendra Kumar
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Design and Development of Logical Effort Based Automated Transistor
Width Optimization Methodology
Satish Chandra Tiwari, Kunwar Singh and Maneesha Gupta
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PCB Layout Design And Interfacing of 16-Bit 1-MSPS CMOS ADC to FPGA Based
Signal Processing Card
Priya Gupta and Nitesh Kumar
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A Master-Slave Flip Flop for Low Voltage Systems with Improved Power-Delay
Product
Kunwar Singh, Satish Chandra Tiwari and Maneesha Gupta
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VLSI Design for Activation and Membership Function for Neuro-Fuzzy
Integrated System
A.Q. Ansari and Neeraj Kumar Gupta
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High Speed CMOS Charge Pump Circuit for PLL Applications Using 90nm CMOS
Technology
Jyoti Gupta, Ankur Sangal
and Hemlata Verma
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Performance Comparison of Fuzzy and Choquet Fuzzy Integral Control
for Line of Sight Stabilization Application
Ravindra Singh, M. Hanumandlu, Shahida Khatoon and
Ibraheem
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Investigation of Low-Power Techniques in Network-on-Chip
Manoj Sharma and Mohammad Ayoub Khan
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Second Order Multi-Mode Notch/Allpass Filter using Single Current Differencing
Buffered Amplifier
Gagandeep Kaur and Mohammad Ayoub Khan
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